1. Field of the Invention
The present invention relates to a semiconductor chip package and a manufacturing method thereof, more specifically to a board on chip package and a manufacturing method thereof.
2. Description of the Related Art
As electronic devices become smaller, miniature semiconductor chip packages of high performance are required. Accordingly, the widely used is a multi-chip package that has a plurality of semiconductor chips stacked in layers or arrayed laterally on a plane, or a board-on-chip package that combines a semiconductor chip directly to a substrate and seals them.
Unlike a conventional semiconductor chip package that installs a semiconductor chip on a substrate by means of a lead-frame, the board on chip (BoC) mounts a bear die itself directly onto the substrate, reducing thermal and electronic losses due to the high speed of DRAM. Thus, the board on chip is receiving attention as a next-generation high-speed semiconductor substrate appropriate for a high-speed DRAM such as a DDR2. The capacity of the DRAM is increasing rapidly from 128 MB to 256 MB, 512 MB, 1 GB, 2 GB, etc., and accordingly, the substrate should be thinner in order to reduce electronic losses and ensure reliability,
A conventional board on chip package has a hole in the center of the substrate to be connected with a semiconductor chip, and this structure was designed to speed up a memory by shortening the distance a signal travels.
FIG. 1 is a sectional view of a board on chip package according to the prior art. Referring to FIG. 1, a conventional board on chip package embodied as a ball grid array package includes a circuit substrate 110 and a semiconductor chip 120. The circuit substrate 110 and the semiconductor chip 120 is electrically connected through a bonding wire 130, of which one end is combined with a bonding pad 140 formed on one side of the semiconductor chip 120 and the other end is combined with a pad 150 formed on the circuit substrate 110. Here, the bonding wire 130 is coated with a molding resin 160, and a plurality of solder balls 170 are formed on one side of the circuit substrate 110 so that the board on chip package can be electrically connected with an external device (not shown) In short, the conventional board-on-chip transmits an electric signal through a bonding wire without forming a via hole in the substrate. Having a minimum length, such a bonding wire hinders the substrate from being thinner. Therefore the conventional board on chip structure is not appropriate for a memory having a large capacity (for example, DRAM).